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- Path: valour.pem.cam.ac.uk!not-for-mail
- From: cbrown@armltd.co.uk (Chris Brown)
- Newsgroups: comp.sys.amiga.advocacy,comp.sys.amiga.misc
- Subject: Re: Walker vs. the $999 7200/75 w/4xCD!
- Date: 2 Apr 1996 17:16:32 +0100
- Organization: Advanced RISC Machines Limited
- Message-ID: <4jrjt0$86f@valour.pem.cam.ac.uk>
- References: <eraugust-2803960910170001@sbdsk0838.sbrc.hac.com> <1350.6662T1401T2752@mbox.vol.it> <4jpcr3$6ni@valour.pem.cam.ac.uk> <4jrdpv$nbe@mercury.dur.ac.uk>
- NNTP-Posting-Host: valour.pem.cam.ac.uk
-
- In article <4jrdpv$nbe@mercury.dur.ac.uk>,
- M D Sergeant <M.D.Sergeant@durham.ac.uk> wrote:
- >Actually the future is probably in VLIW processors that rely on the compiler to
- >produce long words with multiple instructions, so that there needs be no
- >piplining prediction phase slowing everything down. HP are working on these for
- >their PA8000. This technology was invented (sort of) by Turing in 1946. See the
- >april issue of Byte for more information.
-
- VLIW is what high performance workstation CPUs like Alpha are moving
- towards. The next Alpha (the 21264) will feature 8 way superscalar
- execution with much of the scheduling expected to be done by the
- compiler, for example. This all carries on the process of simplifying
- the hardware, a process started by the RISC revoloution in the '80's.
- --
- /* _ */main(int k,char**n){char*i=k&1?"+L*;99,RU[,RUo+BeKAA+BECACJ+CAACA"
- /* / ` */"CD+LBCACJ*":1[n],j,l=!k,m;do for(m=*i-48,j=l?m/k:m%k;m>>7?k=1<<m+
- /* | */8,!l&&puts(&l)**&l:j--;printf(" \0_/"+l));while((l^=3)||l[++i]);}
- /* \_,hris Brown -- All opinions expressed are probably wrong. */
-